1. Field of the Invention
The invention relates to high speed driver circuits. More particularly the invention relates to a digital driver circuit of known fixed output impedance, with variable output amplitude, with fast transitions between two binary states, and at the same time keeps the overshoot of the driver output to a minimum for all amplitudes.
2. Prior Art
Numerous driver circuits are known to the prior art. One conventional circuit utilizes a differential pair of transistors which may be driven by a flip-flop. Variable amplitude is achieved by changing the current in the current source. This is done by varying the current source base voltage. Transition time and overshoot/undershoot characteristics for drivers of this type do not meet the demands of more sophisticated high electronic equipment, such as test systems for integrated circuit logic and array chips.
3. Background Art
The following patents are directed to driver circuits and various current switch circuits with current sources. It is to be appreciated that the following art is not necessarily the only, the best, or the most pertinent art.
U.S. Pat. No. 3,519,810 entitled "Logic Element (Full Adder) Using Transistor Tree-Like Configurations" granted July 7, 1970 to U. Priel et al.
U.S. Pat. No. 3,925,691 entitled "Cascode Node Idle Current Injection Means" granted Dec. 9, 1975 to J. Gaskill, Jr. et al.
U.S. Pat. No. 3,955,099 entitled "Diode Controlled Idle Current Injection" granted May 4, 1976 to J. Gaskill, Jr. et al.
U.S. Pat. No. 4,215,418 entitled "Integrated Digital Multiplier Circuit Using Current Mode Logic" granted July 29, 1980 to J. Maramatsn.
U.S. Pat. No. 4,228,369 entitled "Integrated Circuit Interconnection Structure Having Precision Terminating Resistors" granted Oct. 14, 1980 to N. Anantha et al.
U.S. Pat. No. 4,276,485 entitled "Monolithic Digital Semiconductors Circuit Comprising a Plurality of Bipolar Transistors" granted June 30, 1981 to P. Rydval.
U.S. Pat. No. 4,311,925 entitled "Current Switch Emitter Follower Latch Having Output Signals With Reduced Noise" granted Jan. 19, 1982 to A. Chang et al.
U.S. Pat. No. 4,349,750 entitled "Switching Circuit Comprising A Plurality of Input Channels And An Output Channel" granted Sept. 14, 1982 to M. Geurts.
U.S. Pat. No. 4,408,134 entitled "Unitary Exclusive Or-And Logic Circuit" granted Oct. 4, 1983 to M. Allen.